Clock Domain Crossing Standard to be Explored
A new Proposed Working Group (PWG) will focus on defining a standard Clock Domain Crossing (CDC) collateral specification to ease SOC integration. Currently, SoC teams cannot reuse IP-level CDC collateral in the SoC environment if both teams use different CDC verification tools, causing a time-consuming CDC verification problem. Standardization on CDC collateral will bring significant benefit to not only product companies, but also IP design houses, EDA tool companies, and the entire ecosystem.
The first Proposed Working Group meeting will be held Tuesday, September 13th from 9am – 4pm PT at Intel SC12, 3600 Juliette Lane, Santa Clara, SC12-538. For more information about the PWG, visit here.
DVCon U.S. Videos Now Available
Recorded proceedings from DVCon U.S. 2022 are now available on Accellera's Vimeo showcase, including keynotes, panels, tutorials, workshops, and the UVM Birds of a Feather. You can also view the proceedings, including papers, posters, presentations and video archives from previous DVCon conferences here.
Congratulations Lynn Garibaldi, Recipient of the 2022 Accellera Leadership Award
Lynn Garibaldi is the recipient of the 2022 Accellera Leadership Award. The award recognizes the vision, leadership and contribution to standards development, governance and promotional activities of an Accellera member on behalf of the organization. The award was presented to Lynn at the 59th Design Automation Conference (DAC) during the Accellera-sponsored luncheon. Find out more >
- August newsletter now available
- Podcast: The History, Reach and Impact of Accellera with Lynn Garibaldi
- Article: Accellera at DVCon U.S. 2022 in the Metaverse!
- EDACafe Bunker Broadcast Video: Pre-silicon D&V innovation and standardization efforts from Accellera Accellera
- Article: Design rules for functional safety are explored at DAC
- Article: DAC 2021 – Accellera Panel all about Functional Safety Standards
- Where Is the Functional Safety Standard and Why Adopt It?
- Portable Stimulus: What's Coming in 2.0 and What it Means For You
- Getting to Know Accellera’s Emerging Hardware Security Standard: Security Annotation for Electronic Design Integration
- UVM-AMS: A UVM-Based Analog Verification Standard