Si2 Announces Formation of the Low-Power Coalition
Founding Members Will Integrate Comprehensive Flows Using Open Technologies
Austin, Texas (October 4, 2006) – Silicon Integration Initiative (Si2) announced today the formation of the Low-Power Coalition (LPC) which will deliver enhanced capabilities in low-power Integrated Circuit (IC) design flows relating to specifications of low-power design intent, architectural tradeoffs, logical/physical implementation, design verification and testability. The intent of the LPC is to develop a unified system approach to low power chip design covering the entire design flow, incorporating all applicable standards as necessary. Founding members of the LPC are currently being finalized and will be announced at a later date. All interested parties are invited to join this effort.
The LPC will work to integrate existing open formats and new contributions into complete adoptable flows, and provide critical solutions support including market education and outreach, enabling software, and technical support. Si2 will apply dedicated technical staff resources to the LPC, and collaborate with other relevant groups, including Accellera, IEEE, and the SPIRIT Consortium and other industry organizations.
“Si2 members have underscored the criticality of integrating enhanced low-power capabilities into multi-vendor design flows” said Steve Schulz, president and CEO of Si2. “The LPC not only addresses immediate low-power flow concerns, but also targets further optimizations and enhancements for reusable IP blocks and upstream migration of low-power intent. Si2 looks forward to working with the LPC and other industry organizations to drive adoption of a standard supporting low power design for the industry. All who share an interest in low-power chip design are encouraged to join us in the LPC We welcome the founding members of the LPC and encourage others to join.”
A list of supporting company quotations is located here.
In anticipation of future collaboration, Si2 and Accellera are hosting a Low Power Workshop on October 5 in San Jose. This workshop is intended to serve as an open forum for key contributors from end-user companies to identify the critical needs in the area of low power design, verification, and analysis of integrated circuit chips. Further details on this workshop and the LPC are located at www.si2.org.
About Si2
Si2 is an organization of industry-leading semiconductor, systems, EDA
and manufacturing companies focused on improving the way integrated circuits
are designed and manufactured in order to speed time-to market, reduce
costs, and meet the challenges of sub-micron design. Si2 is uniquely
positioned to enable collaboration through a strong implementation focus
driven by its member companies. Si2 focuses on developing practical
technology solutions to industry challenges. Si2 represents over 100
companies involved in all parts of the silicon supply chain throughout the
world.
For more information, please contact:
William Bayer
Silicon Integration Initiative
512-342-2244, ext. 304 (office)