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About The SPIRIT Consortium


To accelerate the design of large System-on-Chip (SoC) solutions, the semiconductor industry needs a standard mechanism for describing and handling multi-sourced IP that enables automated design integration and configuration within multi-vendor tool flows. The SPIRIT Consortium's founding companies are combining their long experience in IP development, supply, integration and electronic design automation (EDA) to deliver such a mechanism. The Consortium provides a unified set of specifications based on IP meta-data, the IP-XACT specifications, for importing complex IP bundles into SoC design tool sets, and exchanging design descriptions between tools. An API for querying and writing to IP-XACT data-bases is also provided as part of the IP-XACT specifications. The IP-XACT specifications of The SPIRIT Consortium cover two aspects IP integration into tool flows:
  • The IP-XACT IP meta-data description. This meta-data XML schema creates a common and language-neutral way to describe IP, compatible with automated integration techniques and enabling integrators to use IP from multiple sources with IP-XACT enabled tools.
  • The IP-XACT tool integration API. The tool integration API provides a standard method to allow tools to exchange design architectural data, enabling systems integrators to build a more flexible, optimized development environment. IP-XACT enabled tools are able to interpret, configure, integrate and manipulate IP blocks that comply with the proposed IP meta-data description. The Loose Generator Interface (LGI) is the currently provided meta-data dumping interface, and the Tight Generator Interface (TGI) will enable direct data-base querying and writing.
Our Vision

 The SPIRIT Consortium supplies, and will further develop, specifications that enable increased design automation for IP re-use methodologies built on multi-vendor tool flows. This is achieved through unifying ways to describe and provide IP to enable rapid import into tools, automated design configuration and integration, and consistent architectural design refinement from system-level design through to chip layout. By adhering to the specifications, IP suppliers will be able to target their designs automatically to multiple tools, tool vendors will have the ability to rapidly import IP-libraries and designs, and systems-on-chip designers will be able to develop complex 'first-time-right' designs on multi-vendor tool and IP flows customized to their specific needs.

Objectives
  • To operate as a lean and focused organization that reacts quickly to market needs for the development of specifications that fulfill our vision.
  • To demand engineering commitment and results from our Contributing membership, and to actively promote and drive adoption of their work.
  • To collaborate actively with existing standards organizations wherever their technology helps us achieve our goals of promoting more efficient.
  • To develop specifications for describing IP, integration and configuration requirements, and IP packaging as well as plug-in tool IP interfacing to enable more efficient and cost-effective integration of IP from multiple sources.
  • To develop specifications to enable tools to exchange architectural design data to enable multi-vendor integration of tools throughout the design refinement process.
  • To prove the features of each specification on production IP and tools at the time of release, and drive adoption within multiple live projects to provide strong industrial feedback to further refine our deliverables.
  • To transfer all specifications to the IEEE following a period of industrial trial and adoption.